Mobility based Net Ordering for Simultaneous Escape Routing

With the advancement in electronics technology, number of pins under the ball grid array (BGA) are increasing on reduced size components. In small size components, a challenging task is to solve the escape routing problem where BGA pins escape towards the component boundary. It is often desirable to perform ordered simultaneous escape routing (SER) to facilitate area routing and produce elegant Printed Circuit Board (PCB) design. Some heuristic techniques help in finding the PCB routing solution for SER but for larger problems these are time consuming and produce sub-optimal results. This work propose solution which divides the problem into two parts. First, a novel net ordering algorithm for SER using network theoretic approach and then linear optimization model for single component ordered escape routing has been proposed. The model routes maximum possible nets between two components of the PCB by considering the design rules based on the given net ordering. Comparative analysis shows that the proposed net ordering algorithm and optimization model performs better than the existing routing algorithms for SER in terms of number of nets routed. Also the running time using proposed algorithm reduces to O(2) +O(2) for ordered escape routing of both components. This time is much lesser than O(2) due to exponential reduction. Keywords—Net ordering; optimization model; ordered escape routing; PCB routing; simultaneous escape routing